Network Security Research and Development
A New Hampshire based company since 2006.
We specialize in single-chip network security solutions leveraging System-On-Chip (SoC) and Field Programmable Gate Array (FPGA) Architectures through High-Level Synthesis (HLS).
WebSensing's field-programmable gate array (FPGA) enables the following technologies:
We gratefully acknowledge the support of our defense community customers and partners: the Defense Advanced Research Projects Agency (DARPA), Air Force Research Laboratory (AFRL), and the Office of the Under Secretary of Defense for Research and Engineering (USDR&E).
The appearance of U.S. Department of Defense visual information does not imply or constitute DoD endorsement.
A research engineer with more than 20 years of experience in embedded systems, networking, and computer engineering; he is an expert in SoC devices and hardware hiding technologies, which formed the basis of his Ph.D. dissertation. His background includes both team management and lead researcher/development roles spanning regional telecommunications services, network security software development, and sensing & control device development in medical, industrial, automotive, and military markets. He has a strong record of successfully contributing to the growth of start-ups and small businesses. Jason holds a Ph.D. from the Thayer School of Engineering at Dartmouth College. His research interests include embedded system security, adaptive hardware security, high-level synthesis, compiler design, heterogeneous parallel computing, and wireless communications.
A research engineer with more than 10 years of experience in embedded systems, parallel and GPU programming, and computer engineering. He is an expert in systems engineering with SoC devices, GPUs and multicore architectures. His background includes lead researcher and development roles in heterogeneous system development and optimization, computer architecture development and analysis, and embedded software development in the areas of computer vision, signal processing, big data analysis, and deep learning. He has a strong record of contributions to both large and small development projects. Jim holds a Ph.D. in Computer Engineering from Northeastern University. His research interests include embedded systems, parallel and distributed systems, heterogeneous computing and optimization, computer architecture, and deep learning.
Stephen Wille Padnos is a hardware and software designer with more than 25 years of experience. His skills encompass the full range of electronic product design and manufacturing processes, from circuit design to user interfaces. He has worked in a wide range of industries on subjects as disparate as industrial controls, networked image capture, and graphical user interfaces. He has founded two successful engineering companies, and co-designed industry-leading controls for the photography and cinematography markets. Stephen excels at combining knowledge from a wide range of disciplines to solve interesting problems.
A Professor of Computer Engineering at the Thayer School of Engineering at Dartmouth College, Steve is a nationally recognized expert in distributed computing and computer security. He has served the nation as a member of the Air Force Scientific Advisory Board, a program manager for the Defense Advanced Research Projects Agency (DARPA), and a subject matter expert for the Air Force Research Laboratory and other government agencies. Among other awards, he has received the USAF Exemplary Civilian Service Medal, the Lt. Gen Gordon T. Gould, Jr. Award at MILCOM, the Secretary of Defense Medal for Outstanding Public Service, and the DARPA Directors Award for Outstanding Portfolio of Technical Programs. His research interests include computer and network security, embedded systems security, information operations, and surveillance technologies. Steve is an expert in the design and management of large multi-disciplinary technology programs, organizational development, logistics, technology transition, and building state-of-the-art cyber-experimentation infrastructures. His research on large-scale experimentation and cyber metrics led directly to the National Cyber Range (NCR) and the Air Force Cyber Experimentation Environment (CEE).
Hardening Containers for Cross-Domain Applications
J. Dahlstrom, J. Brock, M. Tenaw, M. Shaver and S. Taylor, "Hardening Containers for Cross-Domain Applications," MILCOM 2019 - 2019 IEEE Military Communications Conference (MILCOM), Norfolk, VA, USA, 2019, pp. 1-6.
Protecting Embedded Systems from Zero-Day Attacks
Stephen Taylor, "Protecting Embedded Systems from Zero-Day Attacks", IEEE NAECON 2018, July 23-26, pp 165-168.
Symmetric Multiprocessing from Boot to Virtualization
Robert Denz, Scott Brookes, Martin Osterloh, Stephen Kuhn, and Stephen Taylor, “Symmetric Multiprocessing from Boot to Virtualization”, ACM Software Practice and Experience, Vol 48, Issue 3, March 2018, pp 681-718.
Jason Dahlstrom and Stephen Taylor, "Hardware Turnstile", U.S. Application 16/827,313, Filed 3/23/2020, (Pending).
System-on-Chip Data Security Appliance and Methods of Operating the Same
Jason Dahlstrom and Stephen Taylor, "System-on-Chip Data Security Appliance and Methods of Operating the Same", U.S. Patent 10,148,761, Dec 4 2018.
Jason Dahlstrom and Stephen Taylor, "System-on-Chip Data Security Appliance and Methods of Operating the Same", U.S. Patent 10,389,817, Aug 20 2019. Diode Continuation Patent.
Jason Dahlstrom and Stephen Taylor, "System-On-Chip Data Security Appliance Encryption Device and Methods of Operating the Same", U.S. Patent 10,616,344, Apr 7 2020. VIN Continuation Patent.
Endpoints for Performing Distributed Sensing and Control and Methods of Operating the Same
Jason Dahlstrom and Stephen Taylor, "Endpoints for Performing Distributed Sensing and Control and Methods of Operating the Same", US Patent 10,440,121 , Oct 8 2019.